High-Gain LDMOS Transistor for Cellular Base Station Final Stage

Brand: AIMRSE

Catalog Number

AIMRSE-RFD-27

Category

Transceiver

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This is a family of high-performance, integrated RF-sampling analog front-ends (AFEs) featuring 14-bit resolution with configurations of four or two channels. Each device integrates nine GSPS DACs and three GSPS ADCs, enabling the synthesis and digitization of wideband RF signals. The high dynamic range allows these devices to generate and digitize 3G/4G signals for wireless base stations.

In TDD mode, receiver channels can be dynamically reconfigured between traffic receiver (TDD RX) and wideband feedback receiver (TDD FB) states to support digital predistortion (DPD) of power amplifiers (PAs) in the transmitter path.

The series includes integrated digital step attenuators (DSAs) on the receiver channels and provides equivalent DSA-like gain control functionality on the transmitter paths. Each receiver channel features an analog RF peak power detector and multiple digital power detectors to assist automatic gain control (AGC), along with two RF overload detectors for enhanced device reliability protection.

The family incorporates eight JESD204B-compatible SerDes transceivers operating at speeds up to 15 Gbps. Each TX channel supports up to two digital upconverters (DUCs), and each RX channel includes two digital downconverters (DDCs), with flexible interpolation/decimation ratios and independent, frequency-agile numerically controlled oscillators (NCOs) for digital quadrature modulation/demodulation.

In single-band mode, the devices support RF signal bandwidths exceeding 1000 MHz (or 800 MHz in 4T4R configuration). In dual-band mode, they support up to 800 MHz per band (or 300 MHz per band in 4T4R configuration). A low-jitter PLL/VCO simplifies sampling clock generation by enabling the use of lower-frequency reference clocks.