Wafer materials

Q: What is the difference between CZ and FZ silicon wafers?

CZ (Czochralski) wafers contain oxygen, are cheaper, and support large diameters (300mm), used for Logic/Memory. FZ (Float Zone) wafers are oxygen-free, high-purity, and high-resistivity, used for specialized Power and RF devices.

Q: Why are SiC wafers more expensive than Silicon wafers?

SiC growth is slow (sublimation process), materials are extremely hard (diamond-like hardness making processing difficult), and defect control is challenging, resulting in lower yields and higher costs compared to mature Silicon processes.

Q: What does "Epi-Ready" mean?

Epi-Ready wafers feature a pristine, damage-free surface achieved via CMP polishing and rigorous cleaning. They can be used directly in Epitaxial growth reactors without pre-cleaning, ensuring high-quality film deposition.

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Cat	Products Name	Price
AIMRSE-ECM-WM-1	4-inch Conductive Silicon Carbide Substrate, Z Grade	Request a Quote
AIMRSE-ECM-WM-2	4-inch Conductive Silicon Carbide Substrate, D Grade	Request a Quote
AIMRSE-ECM-WM-3	6-inch Conductive Silicon Carbide Substrate, Z Grade	Request a Quote
AIMRSE-ECM-WM-4	6-inch Conductive Silicon Carbide Substrate, D Grade	Request a Quote
AIMRSE-ECM-WM-5	8-inch Conductive Silicon Carbide Substrate, Z Grade	Request a Quote
AIMRSE-ECM-WM-6	8-inch Conductive Silicon Carbide Substrate, D Grade	Request a Quote
AIMRSE-ECM-WM-7	4-inch Semi-Insulating Silicon Carbide Substrate, Z Grade	Request a Quote
AIMRSE-ECM-WM-8	4-inch Semi-Insulating Silicon Carbide Substrate, D Grade	Request a Quote
AIMRSE-ECM-WM-9	6-inch Semi-Insulating Silicon Carbide Substrate, Z Grade	Request a Quote
AIMRSE-ECM-WM-10	6-inch Semi-Insulating Silicon Carbide Substrate, D Grade	Request a Quote

Wafer Materials: The Foundation of Semiconductor Technology

Semiconductor wafers serve as the fundamental substrate upon which integrated circuits and electronic devices are fabricated. The choice of wafer material determines the electrical, thermal, and mechanical properties of the resulting devices. AIMRSE offers a comprehensive portfolio of High-Quality Wafer Materials engineered to meet the exacting requirements of semiconductor manufacturing across all technology nodes and application domains.

As a critical component of our Electronic Components and Materials offerings, our wafer products represent the starting point for semiconductor device fabrication. We provide materials ranging from traditional silicon to advanced compound semiconductors, each with precisely controlled properties to enable optimal device performance, yield, and reliability in applications spanning computing, communications, power electronics, photonics, and sensors.

Monocrystalline silicon ingot growth process and polished semiconductor wafers Fig 1: Advanced crystal growth technology producing high-purity semiconductor ingots.

1. Semiconductor Wafer Materials Technology

Different wafer materials offer unique combinations of electrical, thermal, and physical properties that make them suitable for specific device applications. AIMRSE provides materials across the complete spectrum of semiconductor substrates.

Silicon (Si) Wafers

The Workhorse of Microelectronics: Monocrystalline silicon remains the dominant substrate for CMOS integrated circuits.

Parameter	Specification
Crystal Orientation	<100>, <111> (±0.5°)
Diameter	150mm (6"), 200mm (8"), 300mm (12")
Resistivity	0.001-100 Ω·cm
Surface Finish	Epi-ready, Polished

Silicon Carbide (SiC) Wafers

Wide Bandgap Power: Superior thermal and electrical breakdown properties for high-voltage applications.

Parameter	Specification
Polytype	4H-SiC, 6H-SiC
Diameter	100mm (4"), 150mm (6"), 200mm (8")
Thermal Conductivity	3.7 W/cm·K (3× Silicon)
Defect Density	MPD < 0.1/cm²

Compound Semiconductors

GaAs & GaN: High electron mobility substrates for RF and Optoelectronic applications.

Parameter	Specification
Material	GaAs, InP, GaN-on-Si
Bandgap	Direct (High Efficiency)
Electron Mobility	> 8000 cm²/V·s (GaAs)
Applications	LEDs, Lasers, RF Amplifiers

2. Advanced Substrate Technologies

Beyond bulk semiconductor materials, engineered substrate structures provide enhanced performance for specific device applications through material combinations and structural innovations.

Silicon-on-Insulator (SOI)

Enhanced Isolation: Consists of a thin single-crystal silicon layer on a buried oxide (BOX) layer. Ideally suited for RF switches and low-power CMOS.

Low Parasitics: Reduced junction capacitance.
Latch-up Immunity: Complete oxide isolation.

Epitaxial Wafers (Epi)

Precision Layers: Wafers with a deposited single-crystal layer (e.g., Si-on-Si, SiC-on-SiC). Allows precise control of doping profiles.

Defect Reduction: Improved crystal quality.
Doping Control: Sharp transitions for power devices.

Engineered Substrates

Heterogeneous Integration: Bonding different materials (e.g., GaN-on-SiC) to combine high mobility with high thermal conductivity.

Thermal Management: Enhanced heat dissipation.
Cost Optimization: Using cheaper substrates for expensive films.

Patterned Substrates

MEMS & LED: Wafers with pre-etched patterns (PSS) or cavities to improve light extraction or facilitate sensor fabrication.

Light Extraction: Improved LED brightness.
Stress Relief: Reduces bowing in hetero-epitaxy.

Cross-section diagram of Silicon-on-Insulator (SOI) wafer showing device layer and buried oxide Fig 2: SOI wafer structure enabling superior isolation and reduced parasitic capacitance.

3. Wafer Quality & Specification Parameters

Wafer quality is characterized by numerous parameters that directly impact device yield, performance, and reliability. AIMRSE implements rigorous quality control to ensure wafer specifications meet or exceed industry standards.

Crystalline Perfection

Minimizing crystal defects is paramount. We control Dislocation Density (EPD) to < 100/cm² for epi-ready wafers. Parameters like stacking faults, slip lines, and oxygen precipitates are monitored using X-ray diffraction (XRD) to ensure high yield in fabrication.

Flatness & Geometry

Photolithography depth-of-focus requires extreme flatness. We measure TTV (Total Thickness Variation) to < 1µm and Bow/Warp to < 30µm. Nano-topography is controlled via advanced CMP (Chemical Mechanical Planarization) to ensure surface roughness (Ra) < 0.2nm.

Electrical Uniformity

Consistent electrical performance is ensured by tight resistivity control. We offer radial resistivity variation < 5% for Czochralski (CZ) wafers and < 2% for Float Zone (FZ) wafers. Carrier lifetime and interstitial oxygen content are tailored to specific application needs.

Wafer Materials FAQ

What is the difference between CZ and FZ silicon wafers?

Czochralski (CZ): Grown by pulling a seed crystal from molten silicon in a quartz crucible. Contains some oxygen impurities (strengthens wafer but can cause defects). Used for >90% of ICs (Logic, Memory) due to larger diameters (300mm) and lower cost.

Float Zone (FZ): Grown by passing a heating coil through a polysilicon rod. Does not contact a crucible, resulting in extremely high purity and oxygen-free silicon. Used for high-efficiency power devices, detectors, and RF chips where high resistivity is required.

Why are SiC wafers more expensive than Silicon wafers?

SiC manufacturing is much harder. 1) Crystal Growth: SiC requires sublimation (gas-to-solid) at >2000°C, which is slow (mm/hour) compared to Silicon melt growth (mm/minute). 2) Hardness: SiC is nearly as hard as diamond (Mohs 9.5), making sawing and polishing extremely time-consuming and wearing out tools quickly. 3) Defects: Controlling micropipe defects is technically challenging, leading to lower yields.

What does "Epi-Ready" mean?

"Epi-Ready" wafers have a surface quality prepared specifically for Epitaxial growth. They undergo a chemical-mechanical polishing (CMP) process that leaves no subsurface damage and are cleaned to remove all organic/metallic contaminants. Packaged in a cleanroom environment, they can be loaded directly into an MOCVD or CVD reactor without further cleaning, ensuring defect-free film growth.

For optimal application fit, we recommend reviewing latest specifications and validating within your design. Our team is available for technical consultation.

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